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In April 2025 the South China Morning Post reported that Huawei had filed a patent on something strange: a logic circuit for AI chips that computes with three states instead of two.1 Not binary. Ternary. Values of -1, 0 and +1 flowing through the gates where every processor built in the last seventy years has carried only 0 and 1. The filing - application CN119652311A, submitted in September 2023 and published by the Chinese patent office in March 2025 - claims a family of three-valued logic gates that would, in the patent’s machine-translated words, “reduce the number of transistors in the ternary logic circuit, lower power consumption, and improve computing efficiency.”2 The press coverage treated it as a curiosity from the frontier of the US-China chip war. A patent application, no silicon behind it, pointed at the energy crisis of artificial intelligence.

It was not an isolated eccentricity. In November 2024 the US Patent Office granted a patent on a ternary inverter to Ternell, a spinoff of Korea’s Ulsan National Institute of Science and Technology, heir to a Samsung-funded research line that put working ternary transistors on a full wafer back in 2019.3 In June 2025 KAIST got a US grant on a three-state logic element.4 In January 2026, Kyungpook National University got one on a method for building -1/0/+1 gates out of ordinary silicon MOSFETs.5 POSTECH holds two more, on ternary adders and multipliers.6 And in March 2026 The Register covered something better than a patent: a working 24-trit balanced-ternary RISC processor called the 5500FP, running on an FPGA at a hobbyist-accessible price, which the article greeted as the first off-the-shelf general-purpose ternary hardware in about sixty years - since roughly 1965.7

  1. That date is doing a lot of work. It points at a specific factory in Kazan, a specific laboratory attic in Moscow, and a specific man - a war veteran radioman who built fifty computers that counted in threes, watched a ministry strangle them, and spent the rest of a long life insisting the world had taken a wrong turn in 1945. This series has spent forty-nine posts following the machines that made weather forecasting possible, and nearly all of them - the ENIAC of the first computer forecast, the IAS blueprint that the world copied, the Crays, the massively parallel machines of the killer-micros war - agreed on one thing before they agreed on anything else: information is stored in twos. This post is about the road those machines did not take, why it was closed, and why - this is the strange part - it is quietly being reopened, with weather and climate computing supplying some of the best arguments for the reopening.

1. Weighing with both pans

Start with a merchant’s puzzle, because the whole idea is hiding inside it. You have a two-pan balance and you want to weigh out any whole number of kilograms from 1 to 40 using as few standard weights as possible. If you may only put weights in one pan - the pan opposite the goods - you need weights of 1, 2, 4, 8, 16 and 32: the binary solution, six weights. But if you are allowed to put weights in either pan - alongside the goods as well as against them - four weights suffice: 1, 3, 9 and 27. To weigh 8 kilograms you put the 9-weight in one pan, the goods plus the 1-weight in the other, and the balance levels. Eight equals nine minus one. Every weight now has three possible roles: against the goods, with the goods, or left in the box. Three states. The puzzle is centuries old - Bachet published it in 1612, Fibonacci knew a version, and a Persian scholar had it earlier still - and it is the oldest appearance of the number system this whole story turns on.8

That system is called balanced ternary. Ordinary counting uses ten digits; binary uses two, 0 and 1. Balanced ternary uses three digits, and here is the twist: they are not 0, 1, 2 but -1, 0 and +1 - weight in the far pan, weight in the box, weight with the goods. Each position in a numeral is a power of three instead of a power of two, and each digit says whether that power is added, ignored, or subtracted. Eight is written +0-: one nine, no threes, minus one. The digits have a name, coined by analogy with bits: trits.

Counting upward, the pattern looks like this:

decimal balanced ternary meaning
1 + 1
2 +- 3 - 1
3 +0 3
4 ++ 3 + 1
5 +-- 9 - 3 - 1
6 +-0 9 - 3
7 +-+ 9 - 3 + 1
8 +0- 9 - 1
9 +00 9
10 +0+ 9 + 1

The - in these numerals is a digit, not a sign. Negative numbers need no extra notation at all: they are written in the same three-symbol alphabet, first-class citizens of the system.

Why would anyone bother? Because the bookkeeping that plagues binary machines simply evaporates. In binary, negative numbers are an awkward afterthought - sign bits, two’s complement, an asymmetric range with one extra negative value that has bitten generations of programmers. In balanced ternary there is no sign bit because the sign lives in the digits themselves. To negate a number you flip every trit: +0- (eight) becomes -0+ (minus eight). Subtraction stops being a separate operation - negate and add. Comparing two numbers works left to right, like alphabetical order, and the sign of a number is just the sign of its leading trit. Best of all, rounding is free: chop off the last trits of a number and what remains is automatically the nearest multiple, never a lopsided truncation toward zero, because the discarded tail is symmetric about zero. A machine that rounds by doing nothing at all.

Donald Knuth laid out these virtues in The Art of Computer Programming and gave the system the compliment that titles this post: “Perhaps the prettiest number system of all is the balanced ternary notation.”8 He closed the passage with a line that reads differently now than it did when he wrote it in the 1960s: the system’s symmetry and simple arithmetic “will prove to be quite important someday - when the ‘flip-flop’ is replaced by a ‘flip-flap-flop.’”8

There is also a seductive efficiency argument, and it deserves both an airing and a warning label. Suppose the cost of hardware scales with the number of digit positions you build times the number of states each position must hold. Cover the numbers up to a million: decimal needs 6 positions of 10 states, cost 60. Binary needs 20 positions of 2 states, cost 40. Ternary needs 13 positions of 3 states, cost 39.9 Push the mathematics and the ideal radix comes out as e, the base of natural logarithms, roughly 2.718 - and 3 is the closest whole number to e. This “radix economy” argument has circulated since a 1950 US Navy survey of computing technology, and it is the standard first exhibit in any case for ternary.9 The warning label: the advantage of 3 over 2 is about six percent, and the whole calculation leans on the assumption that a three-state device costs exactly 1.5 times a two-state one, which real electronics has never obliged. Brian Hayes, whose essay “Third Base” in American Scientist is the finest short treatment of this subject, put it honestly: “it’s only a hypothesis that such an advantage exists.”9 Ternary’s real charms are the ones above - the vanished sign bit, the free rounding, the symmetry. The radix-economy number is a slogan.

One more thread belongs here, and for a Polish reader it is a pleasure to pull. Three-valued logic - the idea that a proposition might be true, false, or something third - is a Polish invention. Jan Łukasiewicz of the University of Warsaw worked it out in the summer of 1917 and announced it in his farewell lecture in the university’s assembly hall on 7 March 1918, framing the third truth value as objective possibility and the whole enterprise, characteristically, as liberation: “I have declared a spiritual war upon all coercion that restricts man’s free creative activity.”10 He published the system in 1920 in Ruch Filozoficzny as “O logice trójwartościowej” - on three-valued logic. Stephen Kleene built a different three-valued logic in 1938 for computability theory, and its truth tables now run inside every database engine that handles SQL’s NULL.11 Logic and arithmetic are different things - a three-valued logic is about truth, a ternary numeral is about quantity - but on a three-state machine they rhyme: one comparison instruction can answer less, equal or greater in a single step, where binary hardware asks two questions.9 The Lwów-Warsaw school that produced Łukasiewicz belongs to the same Polish logical tradition this series met when three mathematicians from Poznań broke Enigma. The trit, in its logical clothing, speaks Polish.

2. The machine of wood

The first person to build all this was a bank manager in Devon, and he built it out of wood.

Thomas Fowler was born in 1777 in Great Torrington, a small town in the southwest of England, the son of a cooper. Apprenticed to a fellmonger at thirteen, he taught himself mathematics at night from borrowed textbooks, opened a printing shop, and rose to manage the town’s only bank and serve as treasurer of the local Poor Law union - the body that administered relief to the parish poor.12 He had been burned once already as an inventor: his 1828 patent on the thermosiphon, the principle behind convective central heating, was widely pirated, and he lacked the money to sue. The lesson he took was secrecy, and it would cost him his place in history.12

The Poor Law job drowned him in repetitive arithmetic - shares of levies across parishes, in pre-decimal pounds, shillings and pence. In 1838 he published a book of calculating tables built on powers of two and powers of three. Then he went further. In 1840, alone, in the workshop behind his shop, he built a calculating machine that worked directly in balanced ternary - digits +1, 0, -1, the same system Knuth would praise more than a century later. He chose wood over metal for economy and secrecy - after the thermosiphon piracy he would show no craftsman his design, and a machine in metal would have meant machinists, pattern-makers and circulating drawings, while wood he could shape alone behind a closed door. To make wooden precision workable the machine grew large: about six feet long by three wide by one deep.13 In May 1840 he demonstrated it in London to an audience that included Charles Babbage and the logician Augustus De Morgan; the Astronomer Royal, George Biddell Airy, presented an account of it to the British Association later that year. De Morgan wrote a two-page description - nearly all the technical documentation that survives.13

Fowler knew what he had. In a letter to Airy he wrote: “I often reflect that had the Ternary instead of the binary Notation been adopted in the Infancy of Society, machines something like the present would long ere this have been common, as the transition from mental to mechanical calculation would have been so very obvious and simple.”14 He was asking for support to rebuild the machine in metal. It never came. Fowler died in 1843; the machine was eventually dismantled, and no drawing of it survives - the secrecy that had protected the invention from thieves ended up erasing it. What does survive, in the parish church of St Michael and All Angels in Great Torrington, is a stained-glass memorial window commissioned by his son, which depicts the machine - possibly the only contemporary image of the first ternary computer in the world.13 In 1999 two Devon researchers, Pamela Vass and David Hogan, teamed up with the California engineer Mark Glusker to reason the mechanism back into existence from De Morgan’s description; Glusker’s working concept model, three trit-digits multiplied into seven, went on display in the Torrington museum in 2000, and the three of them published the full detective story in the IEEE Annals of the History of Computing.15 The reconstruction multiplies correctly. The idea always worked.

Mathematics arrived at the same station that same year by a different train: in Paris in 1840, Augustin Cauchy published on signed-digit arithmetic and Léon Lalanne immediately followed with a note on the special virtues of balanced ternary.8 A provincial English banker and the French Academy converged on the prettiest number system within months of each other. Then everyone forgot about it for a century.

3. The doctrine of two

The moment of decision came in 1945, and this series has already been in the room. The von Neumann First Draft - the EDVAC report that became the free blueprint for the world’s stored-program computers, including every machine that ever ran a weather model - devotes its fifth section to choosing a number system. Von Neumann’s reasoning ran from the hardware up. The vacuum-tube circuits that hold a digit are simplest with two stable states, he argued; “the trigger circuits with more than two equilibria are disproportionately more involved.” And if the hardware speaks two-valued, the arithmetic should too: “it is natural to use a system of arithmetic in which the digits are also two valued. This suggests the use of the binary system.”16 There it is - the flip-flap-flop considered and rejected, twenty-four years before Knuth wistfully asked for one. Knuth records that balanced ternary got serious consideration at the Moore School in 1945-46, as a replacement for decimal; binary won.8 The 1950 Navy survey that first printed the radix-economy argument could still treat the question as open. Herbert Grosch proposed a ternary design for MIT’s Whirlwind around the same time; Whirlwind was built binary.9 By the early 1950s the question was closed. Binary was not just a choice anymore. It was doctrine, wired into the fifteen-plus IAS-class machines spreading across the world and into every instruction set, every core plane, every language that followed.

Except in one room in Moscow.

4. The river near the university

Nikolai Petrovich Brusentsov was born on 7 February 1925 in Kamianske in eastern Ukraine, the son of a chemical-plant engineer who died when the boy was fourteen. On 21 June 1941 the eighth-grader was conducting a school choir in a song he had composed himself, at a young musicians’ festival in Dnepropetrovsk. The German invasion began the next morning. The family was evacuated east to the Orenburg steppe, where they lived first in tents, then in mud-and-straw barracks that the Ural river flooded in the spring of 1942, taking what little they still owned. He worked as an apprentice while finishing night school, and in February 1943, at eighteen, he was drafted.17 The army trained him as a radio operator and sent him to the reconnaissance section of an artillery battalion. He fought at Nevel, at Vitebsk, through Belarus and the Baltics into East Prussia; a mine once landed at his feet and did not explode. He was awarded the medal For Bravery and the Order of the Red Star. Of the twenty-five eighteen-year-olds who had joined his division with him in August 1943, five were alive at the end of the war.17

After the war came engineering school in Moscow, a fought-off case of tuberculosis, and a stroke of dormitory luck: his study partner was Mikhail Kartsev, a future computer designer, who in the early 1950s showed him a working computer - Isaak Brook’s M-2 - for the first time. Brusentsov later said he immediately fell in love.17 In 1953 he was assigned to the design bureau of Moscow State University, and there he met the man he would credit for everything that followed: the mathematician Sergei Sobolev, one of the great analysts of the century - the Sobolev of Sobolev spaces, the natural habitat of every well-posed formulation of the fluid equations this series lives on. “When I first came to Sergei Sobolev’s office, it seemed as if I was enveloped in sunlight,” Brusentsov recalled. “We hit it off immediately and I will be forever grateful to providence for leading me to this remarkable man.”17

Sobolev wanted a small, cheap, reliable computer for universities and schools - and he had just lost the machine he was counting on. He had arranged for Brook’s M-2 to be transferred to the university; then, at an Academy of Sciences election, Sobolev voted for Sergei Lebedev over Brook, Brook took offense, and the transfer died. Sobolev’s response set the whole story in motion: perhaps it was for the best - the university would build its own.17 He ran a weekly seminar with some of the best numerical minds in Moscow to dissect existing machines, and on 23 April 1956 the seminar formally set the task of designing a small computer and put the thirty-one-year-old Brusentsov in charge. Nothing about it was ternary yet. Vacuum tubes were ruled out as unreliable; transistors were not to be had in the Soviet Union; that left magnetic elements - ferrite cores and diodes.18

The ternary idea arrived through a flaw in someone else’s design. Brusentsov was sent to study the magnetic-element computer LEM-1 in Lev Gutenmakher’s laboratory (“to me it seemed technically weak,” he said later), and he noticed that half the ferrite cores in Gutenmakher’s circuits sat idle, wired in purely to compensate noise - and not even doing that well.17 His insight was to make the loafing core work. A pair of cores operated jointly has three clean stable states. Once each cell is three-valued, the natural arithmetic is base three - and if you choose the balanced form, with digits -1, 0, +1, you inherit all of Fowler’s and Lalanne’s elegances: no sign bit, subtraction for free, rounding by truncation, half the conditional branches. By Brusentsov’s count, the ternary design needed about seven times fewer elements than Gutenmakher’s equivalent binary circuitry.17 He built a ternary adder to prove it; it worked on the first try. He was keenly aware how the proposal would have sounded almost anywhere else. Anyone but Sobolev, he said, would have answered: “What’s wrong with you? Everyone builds binary - where do you think you’re going?”19 Sobolev heard him out, checked the arithmetic, and gave him carte blanche.

The machine was named Setun, after the small river that runs near the university’s Lenin Hills campus into the Moskva. The team never exceeded about twenty people, and it started as ten - Brusentsov, four engineers, five technicians - in a single sixty-square-metre room. Every morning, everyone including the chief designer began the day by winding fifty-two turns of wire onto three-millimetre ferrite cores with an ordinary sewing needle.17 Out of this cottage industry came, by December 1958, a working computer - about two years from the seminar’s assignment, and it ran correctly after only ten days of adjustment, a commissioning speed unheard of at the time.18

Scientific staff working at the Setun ternary computer in 1959: cabinets of magnetic-amplifier logic, a control desk, and paper-tape equipment.
The Setun at Moscow State University, 1959. Balanced ternary arithmetic, 18-trit words, magnetic-amplifier logic clocked at 200 kHz, ferrite memory paged against a magnetic drum - and a total of 37 vacuum tubes in the whole machine, in an era when computers routinely contained thousands. Photograph: Sputnik magazine, 1959; public domain.

As a piece of engineering, Setun was a study in frugality. Words were 18 trits long - about the information content of 28 bits - with 9-trit half-words for instructions; the instruction set held 24 opcodes out of a possible 27, and three were never needed. Main memory was tiny even for the day, 81 words of ferrite arranged in pages that swapped automatically against a magnetic drum of 1944 nine-trit cells - a memory hierarchy, in 1958, on a machine assembled with a sewing needle. The logic ran on about 3500 miniature magnetic amplifiers clocked at 200 kHz, with 330 transistors and only 37 vacuum tubes in the entire computer. It drew 2.5 kilowatts - roughly one electric kettle.20 Speed depended on how often a program touched the drum: several hundred to about a thousand operations per second on average, rising to between two and four and a half thousand on compute-bound work.20 Modest numbers. But the machine’s real numbers were of a different kind: at state trials in April 1960 it delivered 95 percent useful uptime, in a period when 60 percent was considered very good, and the commission recommended it for serial production.21

Then the Soviet computing bureaucracy tried to kill it, twice, and the record of how survives mostly in Brusentsov’s own telling - vivid, angry, and uncontradicted by anything in the archives. In the autumn of 1959, before the state trials, Setun appeared on a list of projects to be shut down. At the decisive committee session, Sobolev asked the director of SKB-245 - the state computer design bureau, a competitor - whether he had at least seen the machine, which existed and worked. The answer Brusentsov never forgot: “We don’t need to see it or know it - there must be an authoritative paper with stamps and signatures.”19 Sobolev went to the Central Committee the same day; an official was in the laboratory by evening; the machine, as Brusentsov put it, worked like a clock, and the closure was rescinded. Round two came at the factory. Serial production was assigned to the Kazan Mathematical Machines Plant, whose management wanted nothing to do with an oddball university design and tried to have the first factory-built unit declared unfit. Brusentsov’s team took the second unit and hand-adjusted it to their own documentation; in acceptance testing it ran at 98 percent effectiveness with exactly one recorded failure - a blown diode in the teletype. On 30 November 1961 the plant’s director signed the acceptance act that, in Malinovsky’s dry summary, “ended his attempts to thwart the production of the computer.”17

Kazan built Setuns at a trickle - ten to twenty a year, the sources disagree, and the disagreement hardly matters - until 1965, when production was stopped with orders still unfilled. About fifty machines existed in all, counting the prototypes. Thirty went to universities and institutes, the rest to laboratories and factories, scattered from Kaliningrad on the Baltic to Yakutsk in the permafrost, and the machines earned a reputation for running in any climate, essentially without service engineers or spare parts.18 Brusentsov liked to tell of the astrophysical institute in Yakutsk where a problem that had defeated a much larger Ural-2 for two years was solved on the little ternary machine in six weeks; the locals initially took the assignment for a joke.19

Why kill a machine like that? Not for any failure of the mathematics - no one ever claimed the ternary arithmetic caused trouble. The recorded reasons are almost comically Soviet. Setun was unplanned, a “fruit of university fantasy” from outside the ministry system, as the Russian computer museum’s history puts it, and the officials of the industry “permanently attempted to annihilate the ugly duckling.”18 And it was cheap - 27500 rubles complete, its magnetic elements stamped out in Astrakhan for three and a half rubles apiece - which under Soviet plant economics made it nearly worthless to manufacture.21 Foreign orders came in and were refused. Brusentsov recalled a Czechoslovak factory that had tooled up to produce Setun under license - drum, printer and tape reader ready - and begged for documentation that never arrived; the machine was cancelled at home before the license could be granted.19 After production ended, the university bought a binary machine of comparable performance to replace it. It cost two and a half times as much.18

One caveat belongs in the ledger, and Hayes spotted it: Setun stored each trit in a pair of ferrite cores, and a pair of cores can hold two bits - which is more information than one trit. Measured purely as information per core, the machine’s own memory squandered the ternary advantage its arithmetic was built on.9 Brusentsov’s seven-fold savings claim and Hayes’s squander verdict are both defensible; they measure different things - one counts elements against a rival binary design of the day, the other counts information against the cores. The honest summary is that Setun proved ternary arithmetic practical, reliable and cheap. It did not prove ternary storage superior, and the question of whether a third state pays at the device level would stay open for another sixty years. It is being litigated right now, in the patent filings this post opened with.

5. The attic

The sequel is shorter and harder to read. Through the 1960s Brusentsov and Evgeny Zhogolev designed a successor, and an experimental Setun-70 was running by April 1970. It was a strange, forward-leaning machine: programs built not from fixed instructions but from 6-trit syllables - Brusentsov called the unit a “tryte” - executing over two hardware stacks, an organization that anticipated ideas later celebrated in stack machines and, Brusentsov would insist to the end of his life, in RISC.21 A year in, the group rebuilt its programming model around Dijkstra’s brand-new structured programming, and Brusentsov claimed the combination cut programming effort five- to ten-fold. It was also the last ternary computer anyone built for half a century.

In the early 1970s the laboratory was expelled from the university’s computer centre to a windowless attic in a student dormitory - the new administration, Malinovsky records, regarded computer design as pseudo-science - and the original Setun prototype, still in working order after seventeen years of continuous service, was cut apart and hauled to a dump.17 The team carried the Setun-70 up to the attic and did the one thing no one could forbid: they turned it into a computer-aided instruction system, Nastavnik - “Tutor” - which went on placement-testing and drilling Moscow State students for nearly thirty years. In the 1980s the group distilled the Setun-70’s architecture into DSSP, a Forth-like structured-programming system that ran, with a certain irony, on binary machines.18

Nikolai Brusentsov in 2009, an elderly man at his desk at Moscow State University.
Nikolai Petrovich Brusentsov (1925-2014) in 2009, still heading the computer laboratory of Moscow State University's Faculty of Computational Mathematics and Cybernetics, forty-four years after the last Setun left the Kazan plant. Photograph: Nadir of Moscow, CC BY-SA 4.0, via Wikimedia Commons.

Brusentsov never recanted and never quite forgave. He kept his laboratory, his students, and his conviction, publishing on ternary logic and Aristotelian syllogistic into his eighties, and giving interviews in which the old fire is undimmed. Binary logic, he maintained, was adopted “for merely technical reasons” and a full-fledged informatics “must be ternary”; two-valued logic he called contrary to nature, and of his opponents he said, with a veteran’s bluntness: people stupefied by two-valued logic cannot enter three-valued logic.19 Asked directly, near the end, who Setun had actually bothered, he answered: people of ossified thinking who happened to hold high posts.19 He died in Moscow on 4 December 2014, at eighty-nine. He is one of the great might-have-beens of computing - and this series, which has already walked through the architecture that lost at Bracknell and the parallel machine that arrived too early to make weather, knows the genre. But those were defeats within the rules. Setun is different: the only case in this series where the machine worked, the users wanted it, the economics favoured it, and it lost anyway.

The West barely noticed at the time - a note in the Communications of the ACM in 1960 was the main channel8 - and there was a single Western echo: in 1973 Gideon Frieder’s group at SUNY Buffalo designed a complete balanced-ternary machine called TERNAC and implemented it as a software emulator on a binary Burroughs computer, concluding that a ternary machine was feasible at comparable speed and cost. It stayed an emulator.22 Nobody would build ternary hardware again until the patents and prototypes of the 2020s. The reasons binary won are the ones von Neumann wrote down in 1945 and Hayes summarized in 2001: two states are the easiest thing in the world to distinguish. A transistor slammed fully on or fully off gives the widest possible margin against noise; a third level in the middle narrows every margin and demands finer discrimination, in exchange for a theoretical six percent. And once the world’s fabrication plants, instruction sets, compilers and habits were binary, the sunk investment “would have overwhelmed any small theoretical advantage” anyway.9 Path dependence did the rest. The QWERTY of number systems.

6. Hiding in plain sight

Here the story appears to end, and doesn’t. Because while nobody was building ternary computers, three-state engineering kept slipping into the infrastructure through the side doors - wherever the tyranny of the noise margin ran up against a scarcer resource.

The oldest lodger is in the routers. Every serious network switch resolves addresses with TCAM - ternary content-addressable memory - in which each stored cell holds 0, 1 or X, “don’t care.” The wildcard state is what lets a router match an incoming address against overlapping prefixes of different lengths in a single clock cycle; the entire longest-prefix-match machinery of the Internet leans on a third state.23 It costs silicon - a TCAM cell takes over twice the transistors of ordinary memory - and networking pays, because for that workload the third state is worth more than the transistors. A word of caution about a false friend: the “triple-level cell” (TLC) flash in most SSDs is not ternary - the name means three bits per cell, eight voltage levels, a power of two as usual. Flash proves that multi-level storage can be manufactured by the exabyte; its levels still encode binary.24

The real invasion came through the wires, and it is recent. As signalling speeds climbed into the tens of gigabits, the binary convention - one of two voltage levels per clock tick - hit a wall: doubling the clock doubles the trouble, so engineers started packing more levels into each tick instead. Automotive Ethernet quietly adopted three-level signalling (PAM-3) in the 2010s; there are trits flying through the wiring harness of the car in your driveway.25 USB4’s 80-gigabit generation encodes 11 bits into 7 three-level symbols - 2048 binary values mapped into 2187 ternary ones, with the 139 spare codewords used for control; that is balanced-ternary block coding in a consumer cable.26 And in March 2024 JEDEC published the GDDR7 graphics-memory standard, the first mainstream DRAM interface to abandon two-level signalling: three levels, +1, 0 and -1, carrying three bits per two cycles.27 The detail to savour is why three. GDDR7’s predecessor technology had experimented with four levels (PAM-4). The industry stepped back from four to three because three levels leave 50 percent more voltage headroom between states - a better bargain against noise at speed.28 Von Neumann’s 1945 argument - fewer states, wider margins - has started running in the opposite direction: at modern signalling rates, three is now the conservative choice that four cannot match and two cannot keep up with. Every RTX 50-series graphics card ships with it. The gamers never noticed, which is how infrastructure wins.

So by the mid-2020s the state of play was this: ternary signalling ships by the hundreds of millions of units, ternary storage ships in every router, and ternary logic - actual computation on three states, Setun’s inheritance - remained where it had been since 1970: in the laboratory. That is the door the patents are pushing on.

7. The trit and the AI bill

The reason the laboratory door is being pushed now has a number attached, and the number is the electricity bill of artificial intelligence.

The hardware push is easiest to see from Korea. In 2019, a team at UNIST under Kyung Rok Kim - funded by Samsung since 2017 - demonstrated something the field had lacked for sixty years: a manufacturable three-state device. Rather than fight for a third voltage level against noise, they recruited a quantum leakage current - band-to-band tunnelling, normally a nuisance - as a stable, controllable third state, and showed it working across a full wafer made on standard CMOS processes. The paper, in Nature Electronics, opens with the thesis of the whole revival: the power-density limits of CMOS “could be overcome by moving from a binary to a ternary logic system.”29 Kim told the Korea Herald the work showed ternary chips could be commercialized on existing binary fabrication lines - “which can lead a change in the paradigm of the semiconductors industry.”30 That research line has since hardened into granted patents - the Ternell spinoff’s ternary inverter in 2024, KAIST’s three-state element in 2025, POSTECH’s ternary arithmetic circuits, Kyungpook’s design method in January 202631 - and into a stream of engineering papers on ternary memory and ternary on-chip buses, aimed squarely at the part of a modern chip that hurts most: interconnect, which can consume the large majority of a chip’s dynamic power just moving bits around.32 Huawei’s much-reported filing belongs to this wave, with the caveats the press mostly skipped: it is a published application rather than a granted patent, and there is no known chip implementing it.2 Add the Chinese work on carbon-nanotube ternary gates and the memristor groups building three-state cells - one 2025 paper implements Łukasiewicz’s three-valued logic directly in resistive devices, a Polish logician’s 1917 system finally rendered in hardware33 - and multi-valued logic has more institutional weight behind it than at any time since the Moore School briefly weighed base three in 1946.

The software pull is stranger and, for my money, more consequential. In February 2024, researchers at Microsoft published a paper with a title that sounds like numerology: “The Era of 1-bit LLMs: All Large Language Models are in 1.58 Bits.” The model it describes, BitNet b1.58, is a large language model in which every weight - every learned parameter - takes one of exactly three values: -1, 0 or +1.34 The weights of a neural network are trits. The “1.58” is the trit: log2(3), about 1.585, is the information content of a three-state symbol, the same number hiding in GDDR7’s three-bits-per-two-cycles. And the payoff lands exactly where Fowler and Brusentsov would have predicted. With weights restricted to -1, 0 and +1, multiplication collapses - multiplying by +1, 0 or -1 means keeping, dropping or negating, so the matrix multiplications that dominate AI arithmetic reduce to additions and subtractions, with the zeros free. Balanced ternary’s oldest party tricks, negation-by-flip and multiplication-without-multiplying, redeployed at the scale of billions of parameters. The authors report matching full-precision models of the same size from about three billion parameters up, estimate a 71-fold reduction in arithmetic energy for the matrix work on 7-nanometre silicon, and close by calling for new hardware designed for ternary weights.34 The follow-up framework runs a 100-billion-parameter ternary model on a single CPU at human reading speed.35 The idea has a pedigree - ternary weight networks were proposed back in 201636 - but the 2024 result moved it from compression trick to design point, and the accelerator papers answering the call are now arriving from FPGA groups. When a trillion-parameter industry discovers that its weights want to be trits and its silicon wants ternary arithmetic units, the patent filings of 2023-2026 stop looking like a coincidence.

8. What the weather already knew

A history of weather computing has standing to tell this story for one reason above all: numerical weather prediction spent the last decade discovering, from the opposite direction, the truth that makes ternary interesting - that the number of states you pay for is a physical decision, and that most of the bits in a modern simulation are meteorologically empty.

The oldest machines knew it out of poverty. The ENIAC that computed the first numerical forecasts in 1950 was a fixed-point machine; Charney’s team had to choose scale factors for every quantity by hand, and the month-long computation flowed through roughly 100000 punched cards because the machine’s writable memory was ten registers.37 Precision was not a setting. It was a wall you built your physics against. The luxury of not thinking about number representation arrived only with standardized floating point in the 1980s, and the weather centres settled, like everyone in scientific computing, into 64-bit double precision as the default of respectability - a default the Fortran of an earlier post baked into a billion declarations. The question of how much precision the atmosphere actually warrants was raised as early as 1976 at ECMWF, then went dormant.38

It woke up because of the electricity bill, the same bill driving the trit revival. The loudest voice was Tim Palmer - the ECMWF ensemble pioneer this series profiled in Thirty-Three Lines on the Map - who spent the 2010s arguing that most of a weather model’s 64-bit words are physically meaningless, because chaos and parametrization error swamp their lower bits, and that the energy spent computing those bits should buy resolution and ensemble members instead. “There is no point,” he wrote in Nature in 2015 under the title “Build imprecise supercomputers,” “in being more deterministic or precise than is justified by the overall accuracy of the computational code”; for the small scales, 64-bit precision “is a waste of computing and energy resources.”39 His Oxford group and ECMWF then did the unglamorous work of proving it: the whole forecast model run at single precision with no loss of forecast skill and a 40 percent saving,38 the spectral transforms pushed experimentally to 16-bit half precision at 9-kilometre resolution,40 and a memorable cautionary tale from Japan, where a global model run naively in single precision grew a spurious wavenumber-5 planetary wave - rounding error, dressed up as weather - until the guilty grid-geometry calculations were repaired and the rest of the model ran happily at low precision.41 Precision, in other words, is not virtue; it is a resource to be spent where the physics needs it. The operational verdict came on 11 May 2021, when ECMWF - the most scrupulous forecasting institution on Earth - switched its production forecasts to single precision and spent the savings on 137-level ensembles.42 And the deepest result goes further: a 2021 analysis in Nature Computational Science measured the actual information content of forecast fields and found that most atmospheric variables carry fewer than seven bits of real information per value.43 Fewer than seven bits, held in sixty-four.

Line the two stories up and they are the same story. The AI industry discovered that the weights of an intelligence can survive in 1.58 bits. The weather community discovered that the state of the atmosphere mostly fits in seven. Both fields are now paying for states they do not need, on hardware whose energy cost scales with the number of states carried, and both have started shedding - through quantization, through single precision, through stochastic rounding, through experimental number formats. Ternary is simply the oldest and prettiest answer to the question both fields are now asking: what is the cheapest state you can afford to be wrong in? Machine-learned forecast models - the Pangu-Weathers and GraphCasts that now rival the physics-based systems - are neural networks like any other, trained in reduced precision already; nothing in principle stops such a model from running with ternary weights on the ternary arithmetic the patents describe. No one has done it. The pieces are, for the first time since 1965, all on the table.

Whether the flip-flap-flop ever ships is a question about fabrication economics, and history counsels betting on incumbency: binary has survived challengers with better cases than six percent. But notice what has already happened without anyone announcing it. The trit came back first through the noise margin (three-level signalling in memories and cables), then through information theory (1.58-bit weights), then through the patent office. Brusentsov, who died in 2014 still insisting that the foundation must be ternary, was refused a future by an official who demanded “an authoritative paper with stamps and signatures.” Sixty-five years later, the authoritative papers with stamps and signatures are arriving from Ulsan and Daejeon and Shenzhen - filed, this time, on the third state’s behalf. The Setun river still runs through the west of Moscow, under the ring roads, past the university whose attic once held the only ternary computers on Earth. It empties, as it always has, into a bigger stream.

Notes and sources

  1. Zhou Xin, “Tech war: Huawei’s ternary logic patent could solve the problem of power-hungry AI chips,” South China Morning Post, 4 April 2025, https://www.scmp.com/tech/big-tech/article/3305201/tech-war-huaweis-ternary-logic-patent-could-solve-problem-power-hungry-ai-chips. The story was picked up widely, e.g. “Huawei patents ‘ternary logic’ to develop energy-efficient AI chips,” Huawei Central, April 2025, https://www.huaweicentral.com/huawei-patents-ternary-logic-to-develop-energy-efficient-ai-chips/, and discussed critically on SoylentNews, “Huawei’s Ternary Logic Breakthrough: a Game-Changer or Just Hype?”, 30 September 2025, https://soylentnews.org/article.pl?sid=25/09/30/1323239. ↩

  2. Huawei Technologies, “Ternary logic gate circuit, computing circuit, chip and electronic device,” Chinese patent application CN119652311A, filed 18 September 2023, published 18 March 2025, https://patents.google.com/patent/CN119652311A/en. The quoted benefit statement is from the machine-translated abstract on Google Patents. Google Patents lists the application’s legal status as pending; press descriptions of an “approved” or “granted” Huawei ternary patent conflate publication with grant, and no fabricated chip based on the filing is known. ↩ ↩2

  3. “Transistor, ternary inverter comprising same, and transistor manufacturing method,” US Patent 12154950, priority 30 December 2019, granted 26 November 2024, inventors Kyung Rok Kim et al., assigned to Ternell Co., Ltd. (originally UNIST Academy-Industry Research Corp.), https://patents.google.com/patent/US12154950B2/en. ↩

  4. “Ternary logic element and ternary logic system including same,” US Patent 12334922, granted 17 June 2025, inventors Yang Kyu Choi and Joon Kyu Han, assigned to KAIST, https://patents.google.com/patent/US12334922B2/en. ↩

  5. “Method of designing ternary logic circuit using MOSFETs having depletion-mode and multi-VTHS,” US Patent 12530514, filed 12 January 2023, granted 20 January 2026, inventors Taigon Song and Hyundong Lee, assigned to Kyungpook National University Industry-Academic Cooperation Foundation, https://patents.google.com/patent/US12530514B2/en. ↩

  6. “Ternary logic circuit device,” US Patents 11533054 (granted 20 December 2022) and 11868740 (granted 9 January 2024), inventors Seokhyeong Kang et al., assigned to POSTECH Research and Business Development Foundation, https://patents.google.com/patent/US11533054B2/en and https://patents.google.com/patent/US11868740B2/en. Ternary logic circuitry has a long patent prehistory, e.g. US4107549, “Ternary logic circuits with CMOS integrated circuits” (1978). ↩

  7. Liam Proven, “It’s not a binary choice: Boffin builds ternary CPU,” The Register, 18 March 2026, https://www.theregister.com/on-prem/2026/03/18/its-not-a-binary-choice-boffin-builds-ternary-cpu/5221407; the article’s standfirst calls the machine “first off-the-shelf general-purpose ternary hardware since c 1965”. It is Claudio Lorenzo La Rosa’s 5500FP, a 24-trit balanced-ternary RISC processor implemented on an FPGA (project site https://www.ternary-computing.com/). Also covered by Hackaday, “Ternary RISC processor achieves non-binary computing via FPGA,” 16 March 2026, https://hackaday.com/2026/03/16/ternary-risc-processor-achieves-non-binary-computing-via-fpga/. ↩

  8. Knuth, D. E., The Art of Computer Programming, Vol. 2: Seminumerical Algorithms, 3rd ed., Addison-Wesley, 1998, section 4.1 on positional number systems; the balanced ternary passage, including “perhaps the prettiest number system of all,” the enumeration of its properties, the “flip-flap-flop” remark, and the note that the system received serious consideration at the Moore School in 1945-1946, appears in the publisher’s own excerpt at https://www.informit.com/articles/article.aspx?p=2221791. Knuth’s historical apparatus there traces signed-digit systems to Colson (1726) and Cauchy (1840), credits Léon Lalanne’s 1840 note in the Comptes Rendus as the first pure balanced ternary, notes Fowler’s independent machine of the same year, connects the system to the classic two-pan weights problem, and cites the Western notice of Setun in Communications of the ACM 3 (1960), 149-150. ↩ ↩2 ↩3 ↩4 ↩5 ↩6

  9. Hayes, B., “Third Base,” American Scientist 89, no. 6 (November-December 2001), 490-494, https://www.americanscientist.org/article/third-base; full text also mirrored at https://web.williams.edu/Mathematics/sjmiller/public_html/105Sp10/addcomments/Hayes_ThirdBase.htm. Hayes works the radix-economy example (60 versus 40 versus 39), traces the argument to the Engineering Research Associates survey High-Speed Computing Devices (McGraw-Hill, 1950), records Grosch’s ternary proposal for Whirlwind, supplies the caveats quoted (“it’s only a hypothesis that such an advantage exists”), the observation that a ternary comparison yields less, equal or greater in one step, and the verdict that Setun’s two-cores-per-trit storage “squandered” the ternary advantage. ↩ ↩2 ↩3 ↩4 ↩5 ↩6 ↩7

  10. Simons, P., “Jan Łukasiewicz,” Stanford Encyclopedia of Philosophy, https://plato.stanford.edu/entries/lukasiewicz/. Łukasiewicz reported working out the three-valued system “in detail last summer” (1917) in the farewell lecture delivered in the assembly hall of the University of Warsaw on 7 March 1918, from which the “spiritual war” sentence is taken; the system was published as “O logice trójwartościowej,” Ruch Filozoficzny 5 (1920), 170-171. ↩

  11. Kleene’s strong three-valued logic was introduced in “On notation for ordinal numbers,” Journal of Symbolic Logic 3 (1938), 150-155, and elaborated in his Introduction to Metamathematics (1952); see Gottwald, S., “Many-Valued Logic,” Stanford Encyclopedia of Philosophy, https://plato.stanford.edu/entries/logic-manyvalued/. On SQL’s NULL as applied three-valued logic see https://en.wikipedia.org/wiki/Three-valued_logic. ↩

  12. The standard biographical sources on Thomas Fowler (1777-1843) are the Devon researchers’ site https://www.thomasfowler.org.uk/ and the reconstruction pages of Mark Glusker at https://www.mortati.com/glusker/fowler/index.htm; see also https://en.wikipedia.org/wiki/Thomas_Fowler_(inventor). Fowler’s 1828 thermosiphon patent (no. 5711) and its piracy are documented on both sites. His Tables for Facilitating Arithmetical Calculations (1838) is scanned in full at https://archive.org/details/tablesforfacili00fowlgoog. ↩ ↩2

  13. The May 1840 London demonstration before Babbage, De Morgan and others, Airy’s presentation to the British Association in August 1840, the machine’s wooden construction and dimensions, the later exhibition of an improved model at King’s College London, and the memorial window in St Michael and All Angels, Great Torrington are documented at https://www.thomasfowler.org.uk/ and https://www.mortati.com/glusker/fowler/about.htm; De Morgan’s surviving description is transcribed at https://www.mortati.com/glusker/fowler/demorgan.htm. ↩ ↩2 ↩3

  14. Fowler to G. B. Airy, quoted at https://www.thomasfowler.org.uk/. The same letter describes the machine as “constructed entirely with my own hands (principally in Wood) with the utmost regard to economy” and gives its dimensions as about six feet by three by one. ↩

  15. Glusker, M., D. M. Hogan, and P. Vass, “The Ternary Calculating Machine of Thomas Fowler,” IEEE Annals of the History of Computing 27, no. 3 (2005), 4-22, https://doi.org/10.1109/MAHC.2005.49. The reconstruction chronology - Vass and Hogan’s research from 1997, Glusker’s involvement from November 1999, the concept model presented to the Great Torrington Museum in August 2000 - is given at https://www.mortati.com/glusker/fowler/recon.htm. ↩

  16. von Neumann, J., First Draft of a Report on the EDVAC, Moore School of Electrical Engineering, University of Pennsylvania, 30 June 1945, sections 5.1-5.2; full text at https://cs.carleton.edu/faculty/jondich/courses/cs208_s19/assignments/16_files/edvac.pdf. The quoted sentences on two-equilibrium trigger circuits and the naturalness of binary are from section 5.1. ↩

  17. Malinovsky, B. N., Pioneers of Soviet Computing, 2nd English ed. (ed. A. Fitzpatrick, trans. E. Aronie), 2010, chapter “The Creator of the Ternary Computer,” pp. 134-138, https://www.sigcis.org/files/SIGCISMC2010_001.pdf (landing page https://www.sigcis.org/malinovsky_pioneers). This chapter is the source for Brusentsov’s childhood and war service, the Kartsev and M-2 episodes, the Sobolev quotations, the Gutenmakher internship and the seven-fold element saving, the sewing-needle detail, the Kazan acceptance battle and the 30 November 1961 act, and the destruction of the prototype (“an experimental prototype that had faithfully worked for seventeen years, was barbarically destroyed and carted off to the dump”). The Russian original chapter is at https://www.computer-museum.ru/books/vt_face/7_brusencov.htm. ↩ ↩2 ↩3 ↩4 ↩5 ↩6 ↩7 ↩8 ↩9 ↩10

  18. Brusentsov, N. P., S. P. Maslov, J. Ramil Alvarez, and E. A. Zhogolev, “Development of ternary computers at Moscow State University,” Russian Virtual Computer Museum, https://www.computer-museum.ru/english/setun.htm. This account gives the 23 April 1956 seminar, the December 1958 completion and ten-day commissioning, the fifty machines and thirty university installations, the geography of deployments, the museum’s “ugly duckling” verdict on the ministry, and the 2.5-times-more-expensive binary replacement. See also the museum’s Hall of Fame biography at http://www.computer-museum.ru/english/galglory_en/Brusentsov.htm and the memorial page of the MSU ternary laboratory at http://ternarycomp.cs.msu.ru/. ↩ ↩2 ↩3 ↩4 ↩5 ↩6

  19. Rumyantsev, D., “Doloy bity!” (“Down with bits!”), interview with N. P. Brusentsov, 2004, https://www.ka2.ru/nauka/rumjantsev.html (also at http://www.trinitas.ru/rus/doc/0226/002a/02260054.htm). This interview is the source, in Brusentsov’s own recollection, of the 1959 blacklist episode and the “authoritative paper with stamps and signatures” reply of the SKB-245 director, the “everyone builds binary” counterfactual, the Yakutsk anecdote, the Czechoslovak license story, and the late-life polemics against binary (“people stupefied by two-valued logic…”; “two-valued logic is contrary to nature”). These accounts trace to a single witness; nothing in the archival record contradicts them, but they are presented here as his testimony, not as independently established fact. ↩ ↩2 ↩3 ↩4 ↩5 ↩6

  20. The period technical description of Setun - 18-trit and 9-trit words, 24 of 27 opcodes used, 81-word ferrite memory paged against a magnetic drum of 1944 nine-trit cells, roughly 3500 magnetic amplifiers with 330 transistors and 37 vacuum tubes, the 200 kHz element clock, 2.5 kVA power draw, and measured speeds from several hundred operations per second average to 2000-4500 on compute-bound work - is preserved at the Russian Virtual Computer Museum, http://www.computer-museum.ru/histussr/setun2.htm. The flat “4500 operations per second” figure often quoted for Setun is the top of that measured range, not a clock specification. ↩ ↩2

  21. Brusentsov, N. P., and J. Ramil Alvarez, “Ternary Computers: The Setun and the Setun 70,” in Perspectives on Soviet and Russian Computing (SoRuCom 2006), IFIP AICT 357, Springer, 2011, 74-80, https://doi.org/10.1007/978-3-642-22816-2_10; open copy via the IFIP digital library, archived at http://web.archive.org/web/20251213041713/https://dl.ifip.org/db/conf/ifip9/sorucom2006/BrusentsovA06.pdf. This paper gives the April 1960 state trials and the 95 percent useful-time figure, the 27500-ruble price and the 3.50-ruble Astrakhan elements, the Setun-70’s trytes and two-stack organization, and the authors’ judgment that the plant had no incentive to build so cheap a machine. ↩ ↩2 ↩3

  22. Frieder’s TERNAC at SUNY Buffalo (1973), a complete balanced-ternary architecture implemented as an emulator on a Burroughs B1700, concluded that a ternary machine was feasible at speed and cost comparable to binary; see https://en.wikipedia.org/wiki/Ternac and Hayes, “Third Base” (note above), which calls the ternary computers of the 1960s “a fad that faded.” ↩

  23. Pagiamtzis, K., and A. Sheikholeslami, “Content-addressable memory (CAM) circuits and architectures: A tutorial and survey,” IEEE Journal of Solid-State Circuits 41, no. 3 (2006), 712-727, https://doi.org/10.1109/JSSC.2005.864128 (author’s page https://www.pagiamtzis.com/pubs/jssc2006-abstract/); a practitioner’s view of TCAM in routers is at https://community.cisco.com/t5/networking-knowledge-base/cam-content-addressable-memory-vs-tcam-ternary-content/ta-p/3107938. ↩

  24. On SLC/MLC/TLC flash terminology - three bits and eight states per TLC cell, all powers of two - see https://www.techtarget.com/searchstorage/definition/TLC-flash-triple-level-cell-flash and Kioxia’s explainer at https://www.kioxia.com/en-jp/rd/technology/multi-level-cell.html. ↩

  25. Automotive Ethernet’s 100BASE-T1 (IEEE 802.3bw, originally Broadcom’s BroadR-Reach) and 1000BASE-T1 (802.3bp) carry data over a single twisted pair using three-level PAM-3 signalling; see the overview at https://www.electronicspecifier.com/industries/automotive/automotive-ethernet-100base-t1-1000base-t1-explained/. ↩

  26. “For USB4 v2, PAM-3 is achieved with a 11b/7t encoder… 11 binary digits corresponding to 2048 different values are encoded to 7 ternary digits which can represent 2187 different values,” with spare codewords used for control: Synopsys, “PAM3 technology implementation in USB4 v2,” https://www.synopsys.com/articles/pam3-technology-implementation-usb4-v2.html. ↩

  27. JEDEC, “JEDEC Publishes GDDR7 Graphics Memory Standard” (JESD239), 5 March 2024, https://www.jedec.org/news/pressreleases/jedec-publishes-gddr7-graphics-memory-standard: “By using 3 levels (+1, 0, -1) to transmit 3 bits over 2-cycles versus the traditional NRZ (non-return-to-zero) interface transmitting 2 bits over 2-cycles, PAM3 offers higher data transmission rate per cycle resulting in improved performance.” ↩

  28. Micron, “Unveiling the next generation of graphics memory: GDDR7,” https://www.micron.com/about/blog/memory/dram/unveiling-the-next-generation-of-graphics-memory-gddr7: PAM-3 “encodes more information (1.5 times more) per signal cycle using three distinct voltage levels: -1, 0 and +1,” and compared with the four-level PAM-4 of GDDR6X “allows for a 50% higher voltage margin and has lower encoder complexity.” GDDR7 is the memory of NVIDIA’s GeForce RTX 50 series, https://www.nvidia.com/en-us/geforce/graphics-cards/50-series/rtx-5090/. ↩

  29. Jeong, J. W., Y.-E. Choi, W.-S. Kim, J.-H. Park, S. Kim, S. Shin, K. Lee, J. Chang, S.-J. Kim, and K. R. Kim, “Tunnelling-based ternary metal-oxide-semiconductor technology,” Nature Electronics 2 (2019), 307-312, https://doi.org/10.1038/s41928-019-0272-8. The abstract states the framing quoted: “The power density limits of complementary metal-oxide-semiconductor (CMOS) technology could be overcome by moving from a binary to a ternary logic system.” ↩

  30. Song Su-hyun, “Samsung-funded researchers develop ternary semiconductor,” Korea Herald, July 2019, https://www.koreaherald.com/article/2053267, including Kim Kyung-rok’s quotation on commercializing ternary semiconductors on current binary-process lines and the Samsung funding since September 2017. ↩

  31. See notes above for the individual grants: US12154950 (Ternell/UNIST, 2024), US12334922 (KAIST, 2025), US11533054 and US11868740 (POSTECH, 2022/2024), US12530514 (Kyungpook, 2026). The UNIST group’s continuing engineering line includes a 28-nm ternary compute-in-memory macro (IEEE A-SSCC 2024, https://doi.org/10.1109/A-SSCC60305.2024.10848571) and a ternary on-chip bus (IEEE ISCAS 2026, https://doi.org/10.1109/ISCAS66217.2026.11562877). ↩

  32. Chen, X., et al., “High-performance ternary logic circuits and neural networks based on carbon nanotube source-gating transistors,” Science Advances 11, no. 2 (10 January 2025), eadt1909, https://doi.org/10.1126/sciadv.adt1909, open copy at https://pmc.ncbi.nlm.nih.gov/articles/PMC11721562/. The paper states the motivation adopted here: metal interconnects in modern chips “occupy a large portion of chip area and consume more than 70% of the total dynamic power,” and multi-valued logic promises “higher information density, reduced circuit and interconnect complexity, lower power dissipation.” ↩

  33. “Memristive ternary Łukasiewicz logic based on reading-based ratioed resistive states,” Philosophical Transactions of the Royal Society A 383 (2025), 20230397, https://doi.org/10.1098/rsta.2023.0397. ↩

  34. Ma, S., H. Wang, L. Ma, L. Wang, W. Wang, S. Huang, L. Dong, R. Wang, J. Xue, and F. Wei, “The Era of 1-bit LLMs: All Large Language Models are in 1.58 Bits,” arXiv:2402.17764, 27 February 2024, https://arxiv.org/abs/2402.17764. The paper reports that with every weight ternary in {-1, 0, 1}, BitNet b1.58 “matches the full-precision (i.e., FP16 or BF16) Transformer LLM with the same model size and training tokens in terms of both perplexity and end-task performance,” that its “matrix multiplication… only involves integer addition,” saving “71.4 times arithmetic operations energy consumption for matrix multiplication on 7nm chips,” and calls for “new hardware and system specifically optimized for 1-bit LLMs.” The first open natively ternary model at scale followed: “BitNet b1.58 2B4T Technical Report,” arXiv:2504.12285, April 2025, https://arxiv.org/abs/2504.12285. ↩ ↩2

  35. The bitnet.cpp inference framework “can run a 100B BitNet b1.58 model on a single CPU, achieving speeds comparable to human reading (5-7 tokens per second)”: https://github.com/microsoft/BitNet; see also Wang, J., et al., “Bitnet.cpp: Efficient Edge Inference for Ternary LLMs,” arXiv:2502.11880, https://arxiv.org/abs/2502.11880. ↩

  36. Li, F., B. Zhang, and B. Liu, “Ternary Weight Networks,” arXiv:1605.04711, May 2016, https://arxiv.org/abs/1605.04711. ↩

  37. Lynch, P., and O. Lynch, “The ENIAC Forecasts: A Re-creation,” Bulletin of the American Meteorological Society 89, no. 1 (2008), 45-55, https://maths.ucd.ie/~plynch/Publications/ENIAC-BAMS-08.pdf: the fixed-point arithmetic and hand-assigned scale factors, the ten internal registers, the fourteen card operations per time step, and the roughly 100000 cards punched during the month of the 1950 expedition. ↩

  38. Váňa, F., P. Düben, S. Lang, T. Palmer, M. Leutbecher, D. Salmond, and G. Carver, “Single Precision in Weather Forecasting Models: An Evaluation with the IFS,” Monthly Weather Review 145, no. 2 (2017), 495-502, https://doi.org/10.1175/MWR-D-16-0228.1. The paper reports “no noticeable reduction in accuracy, and an average gain in computational efficiency by approximately 40%,” and notes that “since the early days of numerical weather prediction the issue of appropriate numerical precision has been the subject of considerable interest,” citing Baede et al. 1976; the US Navy’s NOGAPS had run in single precision since the early 1990s. ↩ ↩2

  39. Palmer, T., “Modelling: Build imprecise supercomputers,” Nature 526 (1 October 2015), 32-33, https://doi.org/10.1038/526032a. The companion technical argument is Palmer, T. N., “More reliable forecasts with less precise computations: a fast-track route to cloud-resolved weather and climate simulators?”, Phil. Trans. R. Soc. A 372 (2014), 20130391, https://doi.org/10.1098/rsta.2013.0391 (open copy at https://pmc.ncbi.nlm.nih.gov/articles/PMC4024239/). ↩

  40. Hatfield, S., M. Chantry, P. Düben, and T. Palmer, “Accelerating High-Resolution Weather Models with Deep-Learning Hardware,” Proceedings of PASC ‘19 (2019), https://doi.org/10.1145/3324989.3325711; progress toward half-precision Legendre transforms in the IFS is described in ECMWF Newsletter 157, “Progress in using single precision in the IFS,” https://www.ecmwf.int/en/newsletter/157/meteorology/progress-using-single-precision-ifs. ↩

  41. Nakano, M., H. Yashiro, C. Kodama, and H. Tomita, “Single Precision in the Dynamical Core of a Nonhydrostatic Global Atmospheric Model: Evaluation Using a Baroclinic Wave Test Case,” Monthly Weather Review 146 (2018), https://doi.org/10.1175/MWR-D-17-0257.1: “a spurious wavenumber-5 structure becomes dominant in both hemispheres… this spurious wave growth comes from errors in the calculation of grid cell geometrics.” ↩

  42. ECMWF, “Forecast upgrade innovates with single precision and ensemble resolution,” 11 May 2021, https://www.ecmwf.int/en/about/media-centre/news/2021/forecast-upgrade-innovates-single-precision-and-ensemble-resolution: the move to single precision in IFS Cycle 47r2 “is neutral in terms of performance, but it frees up about 40% of computing power for improvements,” reinvested in raising ensemble vertical resolution to 137 levels. ↩

  43. Klöwer, M., M. Razinger, J. J. Dominguez, P. D. Düben, and T. N. Palmer, “Compressing atmospheric data into its real information content,” Nature Computational Science 1 (2021), 713-724, https://doi.org/10.1038/s43588-021-00156-2: “Most variables contain fewer than 7 bits of real information per value.” The same Oxford-ECMWF line has explored 16-bit arithmetic and alternative number formats for weather models, including posits: Klöwer, M., P. D. Düben, and T. N. Palmer, “Posits as an alternative to floats for weather and climate models,” Proceedings of CoNGA ‘19, https://doi.org/10.1145/3316279.3316281. ↩

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